Modeling, Synthesis, and Rapid Prototyping with the Verilog (Tm) Hdl Book + PRICE WATCH * Amazon pricing is not included in price watch

Modeling, Synthesis, and Rapid Prototyping with the Verilog (Tm) Hdl Book

Verilog aims to introduce new users to the language of Verilog with instruction on how to write hardware descriptions in Verilog in a style that can be synthesized by readily available synthesis tools. Offers clear exposition of the Verilog hardware description language. This book is written in a style that allows the user who has no previous background with hardware description languages (HDLs) to become skillful with the language. Features treatment of synthesis-friendly descriptive styles. An excellent book for self-study, reference, seminars, and workshops on the subject. Read More

from£N/A | RRP: £37.99
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  • 0139773983
  • 9780139773983
  • Michael D. Ciletti
  • 6 March 2000
  • Prentice Hall
  • Hardcover (Book)
  • 724
  • 1
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