The Verilog Tm Hardware Description Language Book

This is the third edition of the very successful standard reference book on the subject. The Verilog TM language is a hardware description language that provides a means of specifying a digital system of a wide range of levels of abstraction. The language supports the early conceptual stages of design with its behavioral level of abstraction, and the later implementation stages with its structural level of abstraction. The language provides hierarchical constructs, allowing the designer to control the complexity of description. The Verilog TM language is an IEEE Standard (No. 1364-1995). The Verilog TM Hardware Description Language, Third Edition starts with a tutorial introduction which presents the major features of the language by example. It then continues with a more complete discussion of the language constructs. Numerous examples are provided to allow the reader to easily learn (and re-learn!) by example. Finally, a formal description of the language is provided in the Appendix. Overall, the presentation balances a learn-by-example style with a definitive discussion of the language. A set of exercises is provided to stimulate thought while reading the book. The Verilog TM Hardware Description Language, Third Edition is of use to both practicing integrated circuit design engineers and undergraduate/graduate electrical or computer engineering students.Read More